{"type":"doc","content":[{"type":"paragraph","content":[{"text":"Been doing some digging into how the uart monitor works currently.","type":"text"}]},{"type":"paragraph"},{"type":"paragraph","content":[{"text":"Will paste a few ascii diagrams I was accumulating on how the components work together…","type":"text"}]},{"type":"paragraph"},{"type":"extension","attrs":{"layout":"default","extensionType":"com.atlassian.confluence.macro.core","extensionKey":"toc","parameters":{"macroParams":{},"macroMetadata":{"macroId":{"value":"80b50837-ae20-4820-b10c-5c9c1f402096"},"schemaVersion":{"value":"1"},"title":"Table of Contents"}},"localId":"88137e0a-c392-472e-b075-171e848cae8e"}},{"type":"heading","attrs":{"level":1},"content":[{"text":"Main Components","type":"text"}]},{"type":"codeBlock","content":[{"text":"+--------------------------------------------------------------------------------------------+\n| machine.vhdl |\n| |\n| +------------------------------------------------------------------------------------+ |\n| | monitor_top.v = uart_monitor | |\n| | | |\n| | +--------------+ | |\n| | | monitor_ctrl | | |\n| | +--------------+ | |\n| | | |\n| | +--------------+ | |\n| | | monitor_bus | | |\n| | +--------------+ | |\n| | 1024 x 16 bytes 1024 x 8 bytes 16 x 8 bytes | |\n| | +--------------+ +---------------+ +---------------+ +--------------+ | |\n| | | monitor_mem | | asym_ram_sdp | | asym_ram_sdp | | asym_ram_sdp | | |\n| | | (monitor.a65)| | (historyram0) | | (historyram1) | | (cpustateram)| | |\n| | +--------------+ +---------------+ +---------------+ +--------------+ | |\n| | | |\n| | +--------------+ | |\n| | | cpu6502 | | |\n| | +--------------+ | |\n| | | |\n| +------------------------------------------------------------------------------------+ |\n| |\n+--------------------------------------------------------------------------------------------+","type":"text"}]},{"type":"bulletList","content":[{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"The uart-monitor is presently written in verilog, with the parent file named \"","type":"text"},{"text":"monitor_top.v","type":"text","marks":[{"type":"strong"}]},{"text":"\"","type":"text"}]}]},{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"It defines a component called \"","type":"text"},{"text":"uart_monitor","type":"text","marks":[{"type":"strong"}]},{"text":"\"","type":"text"}]}]},{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"\"","type":"text"},{"text":"machine.vhdl","type":"text","marks":[{"type":"strong"}]},{"text":"\" makes use of this ","type":"text"},{"text":"uart_monitor","type":"text","marks":[{"type":"strong"}]},{"text":" component, feeds various signals between it and the 4510 cpu.","type":"text"}]}]},{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"Inside the uart-monitor is a 6502 cpu component (also written in verilog).","type":"text"}]}]},{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"It runs the code that resides within the \"","type":"text"},{"text":"monitor_mem","type":"text","marks":[{"type":"strong"}]},{"text":"\" component (which is just the compiled assembly contained within \"","type":"text"},{"text":"monitor.a65","type":"text","marks":[{"type":"strong"}]},{"text":"\")","type":"text"}]}]},{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"There are various other ram components (e.g., ","type":"text"},{"text":"historyram0/1","type":"text","marks":[{"type":"strong"}]},{"text":" and ","type":"text"},{"text":"cpustateram","type":"text","marks":[{"type":"strong"}]},{"text":") that get mapped in a way dictated by the early comment found in “","type":"text"},{"text":"monitor.a65","type":"text","marks":[{"type":"strong"}]},{"text":"”","type":"text"}]}]}]},{"type":"codeBlock","content":[{"text":"; monitor memory map\n;\n; $0000-$00ff - zero page\n; $0100-$01ff - stack\n;\n; $7000-$7fff - CPU State History (16 entries, 8 bytes each)\n; $8000-$8017 - history memory read window (read only)\n;\n; $9000-$97ff - monitor hardware control registers\n;\n; $f000-$ffff - 4K Monitor ROM/RAM, also mirrored at $0000-$0fff","type":"text"}]},{"type":"bulletList","content":[{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"The actual mapping logic is orchestrated by the “","type":"text"},{"text":"monitor_bus","type":"text","marks":[{"type":"strong"}]},{"text":"” component.","type":"text"}]}]}]},{"type":"heading","attrs":{"level":1},"content":[{"text":"cpustateram","type":"text"}]},{"type":"codeBlock","content":[{"text":" +-------------------+\n (clock) clkA | | clkB (clock)\n -------> <-------\n | |\n (cpu_state_write) weA | | enaB (1)\n ------> <-------\n | |\n (1) enaA | |\n ------> |\n { | |\n (0 [15:0]) | |\n (monitor_cpu_state[15:0]) | |\n (monitor_memory_access_address[31:0])| |\n } --> diA[63:0] | cpustateram | doB[7:0] (cpu_state_rdata[7:0])\n -------------> --------------->\n | |\n (cpu_state_write_index) addrA[3:0] | | addrB[6:0] (cpu_address_next[6:0])\n ------------> <--------------\n | |\n +-------------------+","type":"text"}]},{"type":"paragraph","content":[{"text":"This ‘","type":"text"},{"text":"cpustateram","type":"text","marks":[{"type":"strong"}]},{"text":"' component gets mapped to that $7000-$7fff region (from the 6502 cpu’s addressing perspective).","type":"text"}]},{"type":"paragraph","content":[{"text":"It's a dual-port ram, where I've put:","type":"text"}]},{"type":"bulletList","content":[{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"stuff on the left relating to signals wanting to write data into the ram.","type":"text"}]}]},{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"stuff on the right relating to signals wanting to read data from the ram.","type":"text"}]}]}]},{"type":"paragraph","content":[{"text":"So on the left-side (write), seems like the idea is to write a big chunk of cpu-state related information within a single clock cycle.","type":"text"}]},{"type":"bulletList","content":[{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"monitor_cpu_state (16-bit, one byte is the internal cpu-state details, and the other byte is the currently read byte, I think)","type":"text"}]}]},{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"monitor_memory_access_address (32-bit), the current address being accessed. ","type":"text"}]}]}]},{"type":"paragraph","content":[{"text":"On the right-side (read), this is to let this 6502 monitor cpu read out this data via an 8-bit bus (a byte at a time).","type":"text"}]},{"type":"paragraph","content":[{"text":"So, the assembly code within \"","type":"text"},{"text":"monitor.a65","type":"text","marks":[{"type":"strong"}]},{"text":"\" will read from $7000-$7fff to try retrieve this cpu-state trace history.","type":"text"}]},{"type":"paragraph","content":[{"text":"This seems to be the data that is used to generate the output from the uart-monitor's ","type":"text"},{"text":"z","type":"text","marks":[{"type":"strong"}]},{"text":" command. I.e., this stuff:","type":"text"}]},{"type":"codeBlock","content":[{"text":".z\n\nuS Address Rd\n15 0000A50E:EA\n00 00008100:00\n00 00008100:00\n00 00008100:00\n06 00008100:00\n14 0FFF8100:00\n15 00008101:00\n15 0FFF8101:4C\n17 00008102:4C\n17 0FFF8102:0D\n18 00008103:0D\n18 0FFF8103:A5\n4F 00008103:A5\n4F 0FFF8103:EA\n14 0000A50D:EA\n14 0FFFA50D:EA","type":"text"}]},{"type":"heading","attrs":{"level":1},"content":[{"text":"Signals relating to cpustateram","type":"text"}]},{"type":"codeBlock","content":[{"text":" +--------------------------------------------------------------------+\n | monitor_top.v / uart_monitor |\n monitor_cpu_state[15:0] | |\n ------------------------> |\n | |\nmonitor_memory_access_address[31:0] | |\n------------------------------------> |\n | +----------------+ |\n | | monitorctrl | |\n | (monitor_cpu_state[15:8])| | |\n | cpu_state[7:0] | | |\n | -----------------------> | |\n | | | |\n | cpu_state_write | | |\n | <----------------- | |\n | | | |\n | cpu_state_write_index | | |\n | <---------------------- | |\n | | | |\n | +----------------+ |\n | |\n | +----------------+ |\n | (cpu_state_rdata) | monitorbus | |\n | cpu_state | | |\n | ----------------> | |\n | | | |\n | (cpu_address_next[15:0]) | | |\n | cpu_address[15:0] | | |\n | ----------------> | |\n | | | |\n | (cpu_di) | | |\n | read_data[7:0] | | |\n | <--------------- | |\n | +----------------+ |\n | |\n | +----------------+ |\n | | cpu6502 | |\n | (cpu_address_next[15:0]) | (monitorcpu) | |\n | address_next[15:0] | | |\n | <------------------- | |\n | | | |\n | (cpu_di) | | |\n | data_i[7:0] | | |\n | --------------> | |\n | +----------------+ |\n | |\n +--------------------------------------------------------------------+","type":"text"}]},{"type":"paragraph","content":[{"text":"This was me deep-diving even further to learn more about the signals that relate to ","type":"text"},{"text":"cpustateram","type":"text","marks":[{"type":"strong"}]},{"text":" and how that interact with other components.","type":"text"}]},{"type":"heading","attrs":{"level":1},"content":[{"text":"historyram0 and historyram1","type":"text"}]},{"type":"codeBlock","content":[{"text":" (clock) +-------------------+ (clock) (clock) +-------------------+ (clock)\n clkA | | clkB clkA | | clkB\n -------> <------- -------> <-------\n | | | |\n (history_write) | | (1) (history_write) | | (1)\n weA | | enaB weA | | enaB\n ------> <------- ------> <-------\n | | | |\n (1) | | (1) | |\n enaA | | enaA | |\n ------> | ------> |\n | | | |\n (history_wdata[127:0]) | | (history_rdata_lo[7:0]) (history_wdata[191:128]) | | (history_rdata_hi[7:0])\n diA[127:0] | historyram0 | doB[7:0] diA[63:0] | historyram1 | doB[7:0]\n -------------> ---------------> -------------> --------------->\n | | | |\n(history_write_index[9:0]) | | (history_read_address_lo[13:0]) (history_write_index[9:0]) | | (history_read_address_hi[12:0])\n addrA[9:0] | | addrB[13:0] addrA[9:0] | | addrB[12:0]\n ------------> <-------------- ------------> <--------------\n | | | |\n +-------------------+ +-------------------+","type":"text"}]},{"type":"paragraph","content":[{"text":"I haven’t dived too deep into historyram0 and historyram1 as yet, though from my initial gleaming of it, ","type":"text"},{"text":"historyram","type":"text","marks":[{"type":"strong"}]},{"text":" was trying to be more ambitious with the volume of data it captured in each trace entry (current x,y,z,a and a lot more).","type":"text"}]},{"type":"paragraph","content":[{"text":"Hence the reason why the left-side (write) has a data-bus size of 128-bits (can write 16-bytes per clock cycle).","type":"text"}]},{"type":"paragraph","content":[{"text":"I believe it relates to using the ","type":"text"},{"text":"z xx","type":"text","marks":[{"type":"code"}]},{"text":" command. I.e., ","type":"text"},{"text":"z","type":"text","marks":[{"type":"strong"}]},{"text":" with a hex-byte parameter. I think the parameter is the index of the trace-entry within the ram to read from, I believe it will then print register-information just as is done with the ","type":"text"},{"text":"r","type":"text","marks":[{"type":"strong"}]},{"text":" command, but making use of the trace-entry values for these register values had at the time of the trace.","type":"text"}]},{"type":"heading","attrs":{"level":1},"content":[{"text":"Deciphering the 'J' command","type":"text"}]},{"type":"paragraph","content":[{"text":"The 'J' command gets succinctly described in the manual as:","type":"text"}]},{"type":"blockquote","content":[{"type":"paragraph","content":[{"text":"J : DEBUGMON","type":"text","marks":[{"type":"strong"}]},{"type":"hardBreak"},{"text":"Format","type":"text","marks":[{"type":"underline"}]},{"text":": j [value]","type":"text"},{"type":"hardBreak"},{"text":"Usage","type":"text","marks":[{"type":"underline"}]},{"text":": Display, and optionally set, internal signals of the matrix mode monitor","type":"text"},{"type":"hardBreak"},{"text":"interface.","type":"text"}]}]},{"type":"paragraph","content":[{"text":"I’ve been studying various files to get a better feel for what this really does…","type":"text"}]},{"type":"table","attrs":{"layout":"default","width":760.0,"localId":"d3ce4ed8-69fc-4e60-8de4-13ce891b5b02"},"content":[{"type":"tableRow","content":[{"type":"tableHeader","attrs":{"colspan":1,"rowspan":1,"colwidth":[340.0]},"content":[{"type":"paragraph","content":[{"text":"'J' without parameter","type":"text","marks":[{"type":"strong"}]}]}]},{"type":"tableHeader","attrs":{"colspan":1,"rowspan":1,"colwidth":[340.0]},"content":[{"type":"paragraph","content":[{"text":"'J' with parameter","type":"text","marks":[{"type":"strong"}]}]}]}]},{"type":"tableRow","content":[{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[340.0]},"content":[{"type":"paragraph","content":[{"text":"In “","type":"text"},{"text":"monitor.a65","type":"text","marks":[{"type":"strong"}]},{"text":"” and the ","type":"text"},{"text":"debug_cmd:","type":"text","marks":[{"type":"strong"}]},{"text":" section, I saw that:","type":"text"}]},{"type":"paragraph","content":[{"text":"If you type ","type":"text"},{"text":"J","type":"text","marks":[{"type":"code"}]},{"text":" in isolation (with no [value] param), it then prints out the current value of two internal variables, as two hex-bytes placed side-by-side.","type":"text"}]},{"type":"bulletList","content":[{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"These internal variables are called:","type":"text"}]},{"type":"bulletList","content":[{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"mon_trace_step","type":"text","marks":[{"type":"code"}]}]}]},{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"mon_trace","type":"text","marks":[{"type":"code"}]}]}]}]}]}]},{"type":"paragraph","content":[{"text":"Example 1","type":"text","marks":[{"type":"underline"}]},{"text":":","type":"text"}]},{"type":"bulletList","content":[{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"On power-up, typing ","type":"text"},{"text":"J","type":"text","marks":[{"type":"code"}]},{"text":" ","type":"text"}]}]},{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"It will return ","type":"text"},{"text":"0000","type":"text","marks":[{"type":"code"}]},{"type":"hardBreak"},{"text":"I.e.:","type":"text"}]},{"type":"bulletList","content":[{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"mon_trace_step","type":"text","marks":[{"type":"code"}]},{"text":" = ","type":"text"},{"text":"00","type":"text","marks":[{"type":"code"}]}]}]},{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"mon_trace","type":"text","marks":[{"type":"code"}]},{"text":" = ","type":"text"},{"text":"00","type":"text","marks":[{"type":"code"}]}]}]}]}]}]},{"type":"paragraph"},{"type":"paragraph","content":[{"text":"Example 2","type":"text","marks":[{"type":"underline"}]},{"text":":","type":"text"}]},{"type":"bulletList","content":[{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"Type ","type":"text"},{"text":"t1","type":"text","marks":[{"type":"code"}]},{"text":" (to turn trace-mode on), then type ","type":"text"},{"text":"J","type":"text","marks":[{"type":"code"}]}]}]},{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"It will return ","type":"text"},{"text":"0011","type":"text","marks":[{"type":"code"}]},{"type":"hardBreak"},{"text":"I.e.:","type":"text"}]},{"type":"bulletList","content":[{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"mon_trace_step","type":"text","marks":[{"type":"code"}]},{"text":" = ","type":"text"},{"text":"00","type":"text","marks":[{"type":"code"}]}]}]},{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"mon_trace","type":"text","marks":[{"type":"code"}]},{"text":" = ","type":"text"},{"text":"11","type":"text","marks":[{"type":"code"}]}]}]}]}]}]}]},{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[340.0]},"content":[{"type":"paragraph","content":[{"text":"NOTE","type":"text","marks":[{"type":"underline"},{"type":"strong"}]},{"text":": ‘J' with parameter only works on my `","type":"text"},{"text":"uartmon_fixes","type":"text","marks":[{"type":"link","attrs":{"href":"https://github.com/MEGA65/mega65-core/tree/uartmon_fixes"}}]},{"text":"’ branch presently.","type":"text"}]},{"type":"paragraph","content":[{"text":"If you type ","type":"text"},{"text":"J xx","type":"text","marks":[{"type":"code"}]},{"text":" (where ‘xx’ is a hexadecimal byte value):","type":"text"}]},{"type":"bulletList","content":[{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"It sets an the internal variable called ","type":"text"},{"text":"mon_trace","type":"text","marks":[{"type":"code"}]},{"text":" with the xx hex value you specify","type":"text"}]}]},{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"It then prints out the current values of two internal variables, just as it does when 'J' is run without parameters.","type":"text"}]}]}]},{"type":"paragraph","content":[{"text":"Example 3","type":"text","marks":[{"type":"underline"}]},{"text":":","type":"text"}]},{"type":"paragraph","content":[{"text":"Since our prior example had set ","type":"text"},{"text":"mon_trace","type":"text","marks":[{"type":"code"}]},{"text":" to be ","type":"text"},{"text":"11","type":"text","marks":[{"type":"code"}]},{"text":" (which turned trace mode on), let’s turn trace mode off, but instead of using the ","type":"text"},{"text":"t0","type":"text","marks":[{"type":"code"}]},{"text":" command, let’s do it via ","type":"text"},{"text":"J xx","type":"text","marks":[{"type":"code"}]},{"text":":","type":"text"}]},{"type":"bulletList","content":[{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"type ","type":"text"},{"text":"J 00","type":"text","marks":[{"type":"code"}]}]}]},{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"It will return ","type":"text"},{"text":"0000","type":"text","marks":[{"type":"code"}]},{"type":"hardBreak"},{"text":"I.e.:","type":"text"}]},{"type":"bulletList","content":[{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"mon_trace_step","type":"text","marks":[{"type":"code"}]},{"text":" = ","type":"text"},{"text":"00","type":"text","marks":[{"type":"code"}]}]}]},{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"mon_trace","type":"text","marks":[{"type":"code"}]},{"text":" = ","type":"text"},{"text":"00","type":"text","marks":[{"type":"code"}]}]}]}]}]},{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"You can confirm that trace mode has indeed turned off by typing the ","type":"text"},{"text":"r","type":"text","marks":[{"type":"code"}]},{"text":" command repeatedly, and seeing the PC address move around","type":"text"}]}]}]},{"type":"paragraph"},{"type":"paragraph","content":[{"text":"Example 4","type":"text","marks":[{"type":"underline"}]},{"text":":","type":"text"}]},{"type":"paragraph","content":[{"text":"Let’s now do the opposite. Let’s turn on trace-mode, but instead of using ","type":"text"},{"text":"t1","type":"text","marks":[{"type":"code"}]},{"text":", let’s do it via ","type":"text"},{"text":"J xx","type":"text","marks":[{"type":"code"}]},{"text":":","type":"text"}]},{"type":"bulletList","content":[{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"type ","type":"text"},{"text":"J 11","type":"text","marks":[{"type":"code"}]}]}]},{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"It will return ","type":"text"},{"text":"0011","type":"text","marks":[{"type":"code"}]}]}]},{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"You can confirm that trace mode has turned on by typing ","type":"text"},{"text":"r","type":"text","marks":[{"type":"code"}]},{"text":" command repeatedly, and seeing the PC address has halted","type":"text"}]}]}]}]}]}]},{"type":"heading","attrs":{"level":2},"content":[{"text":"What is the ‘mon_trace’ variable?","type":"text"}]},{"type":"paragraph","content":[{"text":"When you set the value of this ","type":"text"},{"text":"mon_trace","type":"text","marks":[{"type":"code"}]},{"text":" variable, it actually sets a byte register inside ","type":"text"},{"text":"monitor_ctrl.v","type":"text","marks":[{"type":"code"}]},{"text":" called ","type":"text"},{"text":"mem_trace_reg","type":"text","marks":[{"type":"code"}]},{"text":" with the value you specify.","type":"text"}]},{"type":"paragraph","content":[{"text":"This register turns out to be a bitfield consisting of:","type":"text"}]},{"type":"table","attrs":{"layout":"default","width":760.0,"localId":"d43af842-b1d0-4283-8f6b-402ec52b2252"},"content":[{"type":"tableRow","content":[{"type":"tableHeader","attrs":{"colspan":1,"rowspan":1,"colwidth":[94.0]},"content":[{"type":"paragraph","content":[{"text":"BIT","type":"text","marks":[{"type":"strong"}]}]}]},{"type":"tableHeader","attrs":{"colspan":1,"rowspan":1,"colwidth":[237.0]},"content":[{"type":"paragraph","content":[{"text":"FIELD NAME","type":"text","marks":[{"type":"strong"}]}]}]},{"type":"tableHeader","attrs":{"colspan":1,"rowspan":1,"colwidth":[1466.0]},"content":[{"type":"paragraph","content":[{"text":"PURPOSE","type":"text","marks":[{"type":"strong"}]}]}]}]},{"type":"tableRow","content":[{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[94.0]},"content":[{"type":"paragraph","content":[{"text":"0","type":"text"}]}]},{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[237.0]},"content":[{"type":"paragraph","content":[{"text":"monitor_mem_trace_mode","type":"text","marks":[{"type":"strong"}]}]}]},{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[1466.0]},"content":[{"type":"paragraph","content":[{"text":"This signal is an output from ","type":"text"},{"text":"monitor_ctrl","type":"text","marks":[{"type":"code"}]},{"text":" with then is routed as an output from ","type":"text"},{"text":"uart_monitor","type":"text","marks":[{"type":"code"}]},{"text":" (monitor_top.v), into ","type":"text"},{"text":"machine.vhdl","type":"text","marks":[{"type":"code"}]},{"text":", and then finally ","type":"text"},{"text":"gs4510.vhdl","type":"text","marks":[{"type":"code"}]},{"text":".","type":"text"}]},{"type":"paragraph","content":[{"text":"Best I can fathom is that ","type":"text"},{"text":"this bit dictates to the CPU if it needs to halt or not","type":"text","marks":[{"type":"underline"}]},{"text":".","type":"text"}]}]}]},{"type":"tableRow","content":[{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[94.0]},"content":[{"type":"paragraph","content":[{"text":"1","type":"text"}]}]},{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[237.0]},"content":[{"type":"paragraph","content":[{"text":"monitor_flag_en","type":"text","marks":[{"type":"strong"}]}]}]},{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[1466.0]},"content":[{"type":"paragraph","content":[{"text":"This signal dictates whether the cpu will be permitted to halt if a flag-breakpoint has been hit or not.","type":"text"}]},{"type":"paragraph","content":[{"text":"I.e., you may have set a flagwatch via the ","type":"text"},{"text":"E xxyy","type":"text","marks":[{"type":"code"}]},{"text":" command (where ","type":"text"},{"text":"xx","type":"text","marks":[{"type":"code"}]},{"text":" is a hex bitfield of flags to break on if set, and ","type":"text"},{"text":"yy","type":"text","marks":[{"type":"code"}]},{"text":" is a hex bitfield of flags to break on if cleared).","type":"text"}]},{"type":"paragraph","content":[{"text":"The ","type":"text"},{"text":"E xxyy","type":"text","marks":[{"type":"code"}]},{"text":" command will turn this ","type":"text"},{"text":"monitor_flag_en","type":"text","marks":[{"type":"code"}]},{"text":" bit on, but if you were to want to temporarily disable flag-breakpoints, you could use the ","type":"text"},{"text":"J xx","type":"text","marks":[{"type":"code"}]},{"text":" command to do so (via this bit1 field)","type":"text"}]}]}]},{"type":"tableRow","content":[{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[94.0]},"content":[{"type":"paragraph","content":[{"text":"2","type":"text"}]}]},{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[237.0]},"content":[{"type":"paragraph","content":[{"text":"history_write","type":"text","marks":[{"type":"strong"}]}]}]},{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[1466.0]},"content":[{"type":"paragraph","content":[{"text":"I ‘think’ this a flag to dictate whether trace info is written into the historyram0/1 components or not.","type":"text"}]},{"type":"paragraph","content":[{"text":"If the bit is set, after 1023 trace entries of the ram have been filled, no more trace entries are recorded, and this bit will be automatically reset.","type":"text"}]}]}]},{"type":"tableRow","content":[{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[94.0]},"content":[{"type":"paragraph","content":[{"text":"3","type":"text"}]}]},{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[237.0]},"content":[{"type":"paragraph","content":[{"text":"history_write_continuous","type":"text","marks":[{"type":"strong"}]}]}]},{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[1466.0]},"content":[{"type":"paragraph","content":[{"text":"This flag is set (in conjunction with history_write), then trace entries will be recorded perpetually. Once the 1023rd entry is filled, following trace entries will be written from entry position#0 and onwards (looping in a circular fashion).","type":"text"}]}]}]},{"type":"tableRow","content":[{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[94.0]},"content":[{"type":"paragraph","content":[{"text":"4","type":"text"}]}]},{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[237.0]},"content":[{"type":"paragraph","content":[{"text":"monitor_irq_inhibit","type":"text","marks":[{"type":"strong"}]}]}]},{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[1466.0]},"content":[{"type":"paragraph","content":[{"text":"This bit is output from ","type":"text"},{"text":"monitor_ctrl","type":"text","marks":[{"type":"code"}]},{"text":" and routed to ","type":"text"},{"text":"gs4510.vhdl","type":"text","marks":[{"type":"code"}]},{"text":" to inhibit irqs being set on the CPU (sounds like it would be handy while step-debugging, and not wanting IRQs to interfere with your debugging journey).","type":"text"}]}]}]},{"type":"tableRow","content":[{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[94.0]},"content":[{"type":"paragraph","content":[{"text":"5","type":"text"}]}]},{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[237.0]},"content":[{"type":"paragraph","content":[{"text":"monitor_hyper_trap","type":"text","marks":[{"type":"strong"}]}]}]},{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[1466.0]},"content":[{"type":"paragraph","content":[{"text":"(unused) Has been hardcoded inside ","type":"text"},{"text":"monitor_ctrl.v","type":"text","marks":[{"type":"code"}]},{"text":" to always be 1 (on).","type":"text"}]},{"type":"paragraph","content":[{"text":"The signal gets routed to ","type":"text"},{"text":"machine.vhdl","type":"text","marks":[{"type":"code"}]},{"text":" where it is ANDed with a signal called ","type":"text"},{"text":"hyper_trap","type":"text","marks":[{"type":"code"}]},{"text":" to become ","type":"text"},{"text":"hyper_trap_combined","type":"text","marks":[{"type":"code"}]},{"text":", and then fed into ","type":"text"},{"text":"gs4510.vhdl","type":"text","marks":[{"type":"code"}]},{"text":", to dictate whether hyper-traps are performed or not. (as this bit is hardcoded to 1, hyper traps always occur, they can’t be disabled).","type":"text"}]}]}]},{"type":"tableRow","content":[{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[94.0]},"content":[{"type":"paragraph","content":[{"text":"6","type":"text"}]}]},{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[237.0]},"content":[{"type":"paragraph","content":[{"text":"monitor_watch_en","type":"text","marks":[{"type":"strong"}]}]}]},{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[1466.0]},"content":[{"type":"paragraph","content":[{"text":"This bit dictates whether the monitor is allowed to halt the cpu if it detects that the user’s watchpoint (data-breakpoint) has hit.","type":"text"}]},{"type":"paragraph","content":[{"text":"Such watchpoints can be set via the ","type":"text"},{"text":"W [address]","type":"text","marks":[{"type":"code"}]},{"text":" command. Hence this bit6 will enable/disable this command from halting the CPU on such an event.","type":"text"}]}]}]},{"type":"tableRow","content":[{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[94.0]},"content":[{"type":"paragraph","content":[{"text":"7","type":"text"}]}]},{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[237.0]},"content":[{"type":"paragraph","content":[{"text":"monitor_break_en","type":"text","marks":[{"type":"strong"}]}]}]},{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[1466.0]},"content":[{"type":"paragraph","content":[{"text":"This bit dictates whether the monitor is allowed to halt the cpu if it detects that the user’s breakpoint address has hit.","type":"text"}]},{"type":"paragraph","content":[{"text":"Such breakpoints can be set via the ","type":"text"},{"text":"B [address]","type":"text","marks":[{"type":"code"}]},{"text":" command. Hence this bit7 will enable/disable this command from halting the CPU on such an event.","type":"text"}]}]}]}]},{"type":"paragraph"},{"type":"heading","attrs":{"level":2},"content":[{"text":"What is the ‘mon_trace_step’ variable?","type":"text"}]},{"type":"paragraph","content":[{"text":"The ","type":"text"},{"text":"mon_trace_step","type":"text","marks":[{"type":"code"}]},{"text":" variable seems to be only writable by the uart-monitor system itself. We can not write to it via the ","type":"text"},{"text":"J","type":"text","marks":[{"type":"code"}]},{"text":" command, but simply keep track of what its value currently is. It appears to be bitfield containing various other internal monitor signals (some which seem closely related to those in ","type":"text"},{"text":"mon_trace","type":"text","marks":[{"type":"code"}]},{"text":").","type":"text"}]},{"type":"paragraph","content":[{"text":"This register turns out to be a bitfield consisting of:","type":"text"}]},{"type":"table","attrs":{"layout":"default","width":760.0,"localId":"c41d4618-105d-4ce4-8bc7-09448a49bbbb"},"content":[{"type":"tableRow","content":[{"type":"tableHeader","attrs":{"colspan":1,"rowspan":1,"colwidth":[48.0]},"content":[{"type":"paragraph","content":[{"text":"BIT","type":"text","marks":[{"type":"strong"}]}]}]},{"type":"tableHeader","attrs":{"colspan":1,"rowspan":1,"colwidth":[96.0]},"content":[{"type":"paragraph","content":[{"text":"FIELD NAME","type":"text","marks":[{"type":"strong"}]}]}]},{"type":"tableHeader","attrs":{"colspan":1,"rowspan":1,"colwidth":[616.0]},"content":[{"type":"paragraph","content":[{"text":"PURPOSE","type":"text","marks":[{"type":"strong"}]}]}]}]},{"type":"tableRow","content":[{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[48.0]},"content":[{"type":"paragraph","content":[{"text":"7","type":"text"}]}]},{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[96.0]},"content":[{"type":"paragraph","content":[{"text":"monitor_break_matched","type":"text","marks":[{"type":"strong"}]}]}]},{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[616.0]},"content":[{"type":"paragraph","content":[{"text":"A flag to indicate whether a breakpoint hit (and genuinely causes the CPU to halt)","type":"text"}]}]}]},{"type":"tableRow","content":[{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[48.0]},"content":[{"type":"paragraph","content":[{"text":"6","type":"text"}]}]},{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[96.0]},"content":[{"type":"paragraph","content":[{"text":"monitor_watch_matched","type":"text","marks":[{"type":"strong"}]}]}]},{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[616.0]},"content":[{"type":"paragraph","content":[{"text":"A flag to monitor whether a watchpoint (data breakpoint) hit (and genuinely causes the CPU to halt)","type":"text"}]}]}]},{"type":"tableRow","content":[{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[48.0]},"content":[{"type":"paragraph","content":[{"text":"5","type":"text"}]}]},{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[96.0]},"content":[{"type":"paragraph","content":[{"text":"monitor_flag_matched","type":"text","marks":[{"type":"strong"}]}]}]},{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[616.0]},"content":[{"type":"paragraph","content":[{"text":"A flag to monitor whether a flag breakpoint hit (and genuinely causes the CPU to halt)","type":"text"}]}]}]},{"type":"tableRow","content":[{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[48.0]},"content":[{"type":"paragraph","content":[{"text":"4","type":"text"}]}]},{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[96.0]},"content":[{"type":"paragraph","content":[{"text":"monitor_watch_en","type":"text","marks":[{"type":"strong"}]}]}]},{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[616.0]},"content":[{"type":"paragraph","content":[{"text":"Seems to be an exact replica of ","type":"text"},{"text":"mon_trace","type":"text","marks":[{"type":"code"}]},{"text":" - bit 6 (not needed?)","type":"text"}]}]}]},{"type":"tableRow","content":[{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[48.0]},"content":[{"type":"paragraph","content":[{"text":"3","type":"text"}]}]},{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[96.0]},"content":[{"type":"paragraph","content":[{"text":"monitor_break_en","type":"text","marks":[{"type":"strong"}]}]}]},{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[616.0]},"content":[{"type":"paragraph","content":[{"text":"Seems to be an exact replica of ","type":"text"},{"text":"mon_trace","type":"text","marks":[{"type":"code"}]},{"text":" - bit 7","type":"text"}]}]}]},{"type":"tableRow","content":[{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[48.0]},"content":[{"type":"paragraph","content":[{"text":"2","type":"text"}]}]},{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[96.0]},"content":[{"type":"paragraph","content":[{"text":"monitor_watch_match","type":"text","marks":[{"type":"strong"}]}]}]},{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[616.0]},"content":[{"type":"paragraph","content":[{"text":"This is a signal that is input into ","type":"text"},{"text":"uart_monitor","type":"text","marks":[{"type":"code"}]},{"text":" component from ","type":"text"},{"text":"cpu4510.vhdl","type":"text","marks":[{"type":"code"}]},{"text":". I assume it is set high when a watchpoint (data breakpoint) is hit.","type":"text"}]},{"type":"paragraph","content":[{"text":"(this can go high even if the CPU wasn’t halted as a consequence)","type":"text"}]}]}]},{"type":"tableRow","content":[{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[48.0]},"content":[{"type":"paragraph","content":[{"text":"1","type":"text"}]}]},{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[96.0]},"content":[{"type":"paragraph","content":[{"text":"0","type":"text","marks":[{"type":"strong"}]}]}]},{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[616.0]},"content":[{"type":"paragraph","content":[{"text":"Unused. Hardcoded to 0","type":"text"}]}]}]},{"type":"tableRow","content":[{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[48.0]},"content":[{"type":"paragraph","content":[{"text":"0","type":"text"}]}]},{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[96.0]},"content":[{"type":"paragraph","content":[{"text":"monitor_mem_trace_toggle","type":"text","marks":[{"type":"strong"}]}]}]},{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[616.0]},"content":[{"type":"paragraph","content":[{"text":"This is an output signal from ","type":"text"},{"text":"monitor_ctrl","type":"text","marks":[{"type":"code"}]},{"text":" that gets routed into ","type":"text"},{"text":"gs4510.vhdl","type":"text","marks":[{"type":"code"}]},{"text":". I haven’t dived into this deeply yet, but I think it relates to single stepping (running for one step, then halting again?)","type":"text"}]}]}]}]},{"type":"paragraph"}],"version":1}